In the sub-nanometer generation, the size of the semiconductor device is gradually decreased, and the integration degree of the integrated circuit is largely enhanced. Correspondingly, the conductive holes formed in a semiconductor substrate for connecting various metal line layers become smaller and smaller. For example, since a through silicon via (TSV) in a silicon fabrication process is small-sized, the aspect ratio of the TSV is increased. For electrically isolating the TSV from the neighboring active components, before the metallic material is filled into the TSV, a liner oxide layer is formed on a sidewall and a bottom surface of the TSV to isolate the metallic material. However, since the aspect ratio of the TSV is high, the thickness of the liner oxide layer on the sidewall and the bottom surface of the TSV is not uniformly distributed. Due to the non-uniform thickness of the liner oxide layer, the stress of the isolation structure is not uniformly distributed or the electrical connection of the TSV conductor is deteriorated.
On the other hand, the uniformity of the thickness of the liner oxide layer on the TSV may be enhanced by using a thermal oxidation process. However, as the thickness of the liner oxide layer is increased, the thickness of the sidewall of the TSV becomes more non-uniform. In addition, after the thermal oxidation process is performed, an additional oxide layer is formed on a part of the surface of the silicon substrate. Since the oxide layer being found at some positions of the substrate (e.g. the backside of the substrate) is considered undesirable, an additional step of removing the oxide layer is necessary. Furthermore, since the thermal oxidation process is carried out at a relatively high temperature, the doped region in the active region of the semiconductor device is adversely affected or a metal layer for transferring electric energy is possibly damaged. In other words, the applications of the thermal oxidation process in the TSV fabrication process are restricted.
Therefore, there is a need of providing an improved method of fabricating an isolation structure of a semiconductor substrate.